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206 Commits
Author SHA1 Message Date
p-mikeg f18269b0eb Fix sev.w arm encoding. 
Unlike the other hints, sev.w op0 missed the 0x in the beginning which led to incorrect parsing.
The encoding should be 0xf3af8004 (https://developer.arm.com/documentation/ddi0403/latest/,
sev encoding T2).
 2026-07-14 09:53:13 -04:00
Ryan Kurtz 6fd250d041 Merge remote-tracking branch 
'origin/GP-5206_ghidorahrex_PR-6598_danlehmann_arm_fix_mrs_apsr' into
patch (Closes #6598, Closes #6597)
 2026-06-12 14:21:34 -04:00
Daniel Lehmann 1de7de83e4 Fix input register for msr apsr 
The msr instruction get the output register from the second 16-bit word,
but it must come out of the first 16-bit word.

This patch fixes the decoding.
 2026-06-09 13:14:54 +00:00
Daniele Pusceddu 5194daa9e5 ARM M-profile: fix mrsipsr ISR_NUMBER mask (0x1f -> 0x1ff) 2026-06-08 13:37:01 +00:00
Ryan Kurtz 9246d6b310 Merge remote-tracking branch 
'origin/GP-6333_ghidorahrex_ARM_thumb_BranchWritePC_fix--SQUASHED' into
Ghidra_12.1 (Closes #8585)
 2026-04-29 06:41:24 -04:00
ghidorahrex d227911877 GP-6333: Fix for ARM Thumb to prevent misaligned branches 2026-04-27 14:04:48 -04:00
ghidorahrex 2b4efbfd68 GP-6750: Fixed disassembly error for ARM neon simdExpImm_16 2026-04-22 18:12:49 +00:00
Dan 84fb9e72f8 GP-0: Fixed ARM disassembly test regressions 2026-03-25 17:55:10 +00:00
ghidorahrex 51471ef773 GP-0: Corrected separator regression in PseudoDisassemblerTest 2026-03-24 13:20:29 +00:00
ghidorahrex e0638c831f GP-0: Corrected ARMAssemblyTest failures 2026-03-20 20:14:51 +00:00
ghidorahrex 5fbbc155a8 GP-5849: Fixed ARM Neon instuction collisions with vmov (immediate) 2026-03-19 09:23:37 -04:00
Ryan Kurtz 509484d2f3 Merge remote-tracking branch 
'origin/GP-6145_ghidorahrex_arm_v8m_missing_instructions--SQUASHED' into
Ghidra_12.1 (Closes #8652)
 2026-03-18 10:05:55 -04:00
ghidorahrex 44504c7780 GP-6145: added missing ARM v8-m instructions 2026-03-18 09:59:22 -04:00
Dan fa23479747 GP-4241: Port EmulateInstructionStateModifiers to PcodeUseropLibraryFactories. 2026-03-18 12:09:45 +00:00
Ryan Kurtz c2cabab6d1 Merge remote-tracking branch 'origin/patch' 2026-01-27 13:47:53 -05:00
Sleigh-InSPECtor c9be1860c1 AArch32: fixed ldrexd 
* fixed addr src register aliased as first dest register of a double word load causing second word load at the value of first load
 2026-01-27 17:28:22 +00:00
Ryan Kurtz aff51b9c96 Merge remote-tracking branch 
'origin/GP-4651_ghidorahrex_PR-6564_Sleigh-InSPECtor_aarch32_thumb_ldrs_pcrel'
(Closes #6564)
 2025-11-26 13:06:45 -05:00
Ryan Kurtz 00978223d3 Merge remote-tracking branch 
'origin/GP-4650_ghidorahrex_PR-6544_Sleigh-InSPECtor_aarch32_vmvn' into
Ghidra_12.0 (Closes #6544)
 2025-11-24 13:58:19 -05:00
Sleigh-InSPECtor 40c8aa60b1 AArch32: (Thumb32) fixed ldrsh.w & ldrsb.w (pc-relative) 
* double memory load bug
 2025-11-20 15:24:17 +00:00
Sleigh-InSPECtor 0982753437 AArch32: fixed vmvn 
* fixed incorrect shift offset (bytes given in place of bits) and double word order
 2025-11-20 15:19:00 +00:00
caheckman 5857e63741 GP-6118 Fix for specialized ARM cpy pc,lr 2025-11-13 20:31:53 +00:00
emteere 5924914b47 GP-6079 ARM instruction CPY into PC with LR set before it is now a call. 
Also fixed a function start pattern, and spurious references placed on
stack save of the PC.
 2025-10-30 20:21:11 +00:00
Dan 352fed0d95 GP-5853: Initial implementation of ARM Neon VLD/VSTn instructions. 2025-07-29 14:32:54 +00:00
Ryan Kurtz 7d76ab5e9b Merge remote-tracking branch 
'origin/GP-4989_ghintern_arm_fix_aapcs--SQUASHED' into patch
(Closes #6958)
 2025-07-14 16:05:48 -04:00
ghintern 3e11715778 GP-4989: Fix ARM AAPCS cspec, add soft float calling convention 2025-07-14 18:38:17 +00:00
Ryan Kurtz 8320d12461 Merge remote-tracking branch 
'origin/GP-4923_ghintern_arm_apcs--SQUASHED' (Closes #7434)
 2025-05-08 12:36:16 -04:00
Ryan Kurtz 541818c274 Merge remote-tracking branch 'origin/patch' 2025-05-08 12:26:49 -04:00
Ryan Kurtz d641f9de69 Merge remote-tracking branch 
'origin/GP-4731_ghidorahrex_PR-5256_befoulad_armv8-splimit' into patch
(Closes #5256, Closes #5255, Closes #6667)
 2025-05-08 12:22:40 -04:00
ghintern 28ca53cb34 GP-4923: cspec, ldefs, opinion file support for ARM apcs abi 2025-05-07 17:41:41 +00:00
Ryan Kurtz 87b1dbb8dc Merge remote-tracking branch 'origin/patch' 2025-05-02 15:17:36 -04:00
Ryan Kurtz 0878da155c Merge remote-tracking branch 'origin/GP-5301_Dan_testEmuThumbPlt' 2025-04-04 12:51:15 -04:00
Dan b702aa0a6f GP-5301: Fix ARM/THUMB ISA mode switching for indirect branches in JIT. 2025-04-04 16:18:36 +00:00
ghidorahrex 7413204896 GP-5469: Added additional arm VMRS/VMSR instruction variants 2025-03-10 16:16:04 +00:00
Ryan Kurtz b2d3c28ca7 Merge remote-tracking branch 
'origin/GP-4648_ghidorahrex_PR-6531_Sleigh-InSPECtor_aarch32_vselgt'
into patch (Closes #6531)
 2025-03-06 12:02:13 -05:00
Ryan Kurtz 0966be0995 Merge remote-tracking branch 
'origin/GP-5386_ghidorahrex_ARM_thumb_strt_patch' into patch
(Closes #7514)
 2025-02-19 10:17:34 -05:00
Ryan Kurtz 2e9f555aa9 Merge remote-tracking branch 
'origin/GP-4649_ghidorahrex_PR-6542_Sleigh-InSPECtor_aarch32_vdup' into
patch (Closes #6542)
 2025-02-19 10:12:35 -05:00
ghidorahrex a2af457dea GP-5386: Added missing ARM thumb strt instruction 2025-02-18 14:03:42 +00:00
ghidorahrex 115353d34c GP-5268: Implemented ARM NEON vld4 instruction 2025-02-06 07:49:28 -05:00
Sleigh-InSPECtor 065ef72288 AArch32: fixed vdup 
* 8byte vector duplication to 16byte performed bitwise AND (destructive) instead of OR of the 8byte shifted results, causing all 16byte vector duplications to be 0
* non-thumb constraints were used in a thumb instruction, added thumb specific constraints and separated them using TMode ctx field
 2025-02-04 16:36:32 +00:00
Sleigh-InSPECtor 26acd697ac AArch32: fixed vselgt 
* added 'and N == V' check missed in the vselcond "gt"
 2025-02-04 16:33:04 +00:00
Ryan Kurtz ef103c8754 Merge remote-tracking branch 
'origin/GP-5181_ghidorahrex_ARM_VFPv2_missing_fix' into Ghidra_11.3
(Closes #7259)
 2025-01-21 07:10:05 -05:00
ghidorahrex e6b326700c GP-4731: Fixed decode for mrs 2025-01-16 20:13:39 +00:00
befoulad 0c43ccb360 wrap stack limit instruction decoders in ifdef block 2024-12-08 18:52:24 +00:00
befoulad bb39e4398b define stack limit registers for armv8-m 2024-12-08 18:49:34 +00:00
Behrang 68171d3302 Merge branch 'NationalSecurityAgency:master' into armv8-splimit 2024-12-08 13:11:17 +00:00
ghidorahrex f83d1142c0 GP-5181: Fixed missing ARM VFPv2 instructions 2024-12-06 16:51:23 +00:00
Dan 7dd417b6be GP-5051: Distinct qemu-system launcher. 2024-12-04 08:43:26 -05:00
dev747368 de80c63e63 GP-4150 add option to ignore DWARF func param storage info 
Add option to DWARF analyzer to ignore storage locations specified for
function parameters.
(the info provided by DWARF info will often not be directly at the func
entry point and requires future dev effort to walk the parameter info
backwards to get it)

Add option to DWARF analyzer to set the default calling convention of
functions created via the analyzer.
 2024-08-23 20:02:04 +00:00
Ryan Kurtz 649c1829f8 Merge remote-tracking branch 'origin/GP-4645_ghidorahrex_PR-6526_Sleigh-InSPECtor_aarch32_ldaexd' into patch 2024-07-22 06:37:05 -04:00
Ryan Kurtz 8aa8b4e165 Merge remote-tracking branch 'origin/GP-4646_ghidorahrex_PR-6529_Sleigh-InSPECtor_aarch32_sha1su0_32' into patch 2024-07-22 06:33:48 -04:00