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add support for riscv32+rvv1.0 (rv32 and rv64ilp32) with c907 support (#6280)
* add support for riscv32+rvv1.0 (rv32 and rv64ilp32) with c907 support * add new action linux rv32 and some fix 1. add new action linux rv32 2. add new toolchains c907-v310 for lp64d 3. fix action paths check
This commit is contained in:
柚木 鉉
@@ -81,7 +81,7 @@ jobs:
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run: |
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run: |
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export RISCV_ROOT_PATH=/data/action/osd/riscv32-elf
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export RISCV_ROOT_PATH=/data/action/osd/riscv32-elf
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mkdir build && cd build
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mkdir build && cd build
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cmake -DCMAKE_TOOLCHAIN_FILE=../toolchains/riscv32-unknown-elf.toolchain.cmake -DNCNN_THREADS=OFF -DNCNN_OPENMP=OFF -DNCNN_BUILD_TESTS=ON ..
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cmake -DCMAKE_TOOLCHAIN_FILE=../toolchains/riscv32-unknown-elf.toolchain.cmake -DNCNN_THREADS=OFF -DNCNN_OPENMP=OFF -DNCNN_BUILD_TESTS=ON -DNCNN_RVV=OFF -DNCNN_XTHEADVECTOR=OFF -DNCNN_ZFH=OFF -DNCNN_ZVFH=OFF ..
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cmake --build . -j 4
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cmake --build . -j 4
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- name: test
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- name: test
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@@ -0,0 +1,62 @@
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name: linux-riscv32
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on:
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push:
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branches: [master]
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paths:
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- '.github/workflows/linux-riscv32.yml'
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- 'toolchains/c907-rv32-v310.toolchain.cmake'
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- 'CMakeLists.txt'
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- 'cmake/**'
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- 'src/*'
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- 'src/layer/*'
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- 'src/layer/riscv/**'
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- 'tests/**'
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pull_request:
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branches: [master]
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paths:
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- '.github/workflows/linux-riscv32.yml'
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- 'toolchains/c907-rv32-v310.toolchain.cmake'
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- 'CMakeLists.txt'
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- 'cmake/**'
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- 'src/*'
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- 'src/layer/*'
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- 'src/layer/riscv/**'
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- 'tests/**'
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concurrency:
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group: linux-riscv32-${{ github.ref }}
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cancel-in-progress: true
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permissions:
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contents: read
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jobs:
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xuantie:
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name: xuantie-${{ matrix.cpu }}
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runs-on: [self-hosted, linux, ubuntu]
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strategy:
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fail-fast: false
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matrix:
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include:
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- { cpu: c907-rv32, QEMU_CPU: c907fdv-rv32, OPENMP: ON, RVV: ON, XTHEADVECTOR: OFF, ZFH: ON, ZVFH: ON }
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steps:
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- uses: actions/checkout@v5
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- name: build
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run: |
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export RISCV_ROOT_PATH=/data/action/osd/Xuantie-900-gcc-linux-6.6.0-glibc-x86_64-V3.1.0
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mkdir build && cd build
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cmake -DCMAKE_TOOLCHAIN_FILE=../toolchains/${{ matrix.cpu }}-v310.toolchain.cmake -DCMAKE_BUILD_TYPE=release \
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-DNCNN_OPENMP=${{ matrix.OPENMP }} -DNCNN_THREADS=${{ matrix.OPENMP }} \
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-DNCNN_RUNTIME_CPU=OFF \
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-DNCNN_RVV=${{ matrix.RVV }} \
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-DNCNN_XTHEADVECTOR=${{ matrix.XTHEADVECTOR }} \
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-DNCNN_ZFH=${{ matrix.ZFH }} \
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-DNCNN_ZVFH=${{ matrix.ZVFH }} \
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-DNCNN_SIMPLEOCV=ON -DNCNN_BUILD_EXAMPLES=ON -DNCNN_BUILD_TESTS=ON ..
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cmake --build . -j 8
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- name: test
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run: |
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export PATH=/data/action/osd/Xuantie-qemu-x86_64-Ubuntu-20.04-V5.2.6-B20250415-1115/bin:$PATH
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cd build
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TESTS_EXECUTABLE_LOADER=qemu-riscv32 TESTS_EXECUTABLE_LOADER_ARGUMENTS="-cpu;${{ matrix.QEMU_CPU }}" ctest --output-on-failure -j 8
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@@ -7,9 +7,9 @@ on:
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- 'toolchains/riscv64-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.llvm-toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.llvm-toolchain.cmake'
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- 'toolchains/c906-v301.toolchain.cmake'
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- 'toolchains/c906-v310.toolchain.cmake'
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- 'toolchains/c908-v301.toolchain.cmake'
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- 'toolchains/c908-v310.toolchain.cmake'
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- 'toolchains/c910-v301.toolchain.cmake'
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- 'toolchains/c910-v310.toolchain.cmake'
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- 'toolchains/k1.toolchain.cmake'
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- 'toolchains/k1.toolchain.cmake'
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- 'toolchains/k1.llvm.toolchain.cmake'
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- 'toolchains/k1.llvm.toolchain.cmake'
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- 'CMakeLists.txt'
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- 'CMakeLists.txt'
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@@ -25,9 +25,9 @@ on:
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- 'toolchains/riscv64-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.llvm-toolchain.cmake'
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- 'toolchains/riscv64-unknown-linux-gnu.llvm-toolchain.cmake'
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- 'toolchains/c906-v301.toolchain.cmake'
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- 'toolchains/c906-v310.toolchain.cmake'
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- 'toolchains/c908-v301.toolchain.cmake'
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- 'toolchains/c908-v310.toolchain.cmake'
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- 'toolchains/c910-v301.toolchain.cmake'
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- 'toolchains/c910-v310.toolchain.cmake'
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- 'toolchains/k1.toolchain.cmake'
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- 'toolchains/k1.toolchain.cmake'
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- 'toolchains/k1.llvm.toolchain.cmake'
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- 'toolchains/k1.llvm.toolchain.cmake'
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- 'CMakeLists.txt'
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- 'CMakeLists.txt'
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@@ -102,6 +102,7 @@ jobs:
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- { cpu: c906, QEMU_CPU: c906fdv, OPENMP: OFF, RVV: OFF, XTHEADVECTOR: ON, ZFH: ON, ZVFH: OFF }
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- { cpu: c906, QEMU_CPU: c906fdv, OPENMP: OFF, RVV: OFF, XTHEADVECTOR: ON, ZFH: ON, ZVFH: OFF }
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- { cpu: c910, QEMU_CPU: c910v, OPENMP: ON, RVV: OFF, XTHEADVECTOR: ON, ZFH: ON, ZVFH: OFF }
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- { cpu: c910, QEMU_CPU: c910v, OPENMP: ON, RVV: OFF, XTHEADVECTOR: ON, ZFH: ON, ZVFH: OFF }
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- { cpu: c908, QEMU_CPU: c908v, OPENMP: ON, RVV: ON, XTHEADVECTOR: OFF, ZFH: ON, ZVFH: ON }
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- { cpu: c908, QEMU_CPU: c908v, OPENMP: ON, RVV: ON, XTHEADVECTOR: OFF, ZFH: ON, ZVFH: ON }
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- { cpu: c907, QEMU_CPU: c907fdv-rv64, OPENMP: ON, RVV: ON, XTHEADVECTOR: OFF, ZFH: ON, ZVFH: ON }
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steps:
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steps:
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- uses: actions/checkout@v5
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- uses: actions/checkout@v5
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@@ -465,6 +465,46 @@ elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(riscv)")
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message(WARNING "The compiler does not support risc-v zfh extension. NCNN_ZFH will be OFF.")
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message(WARNING "The compiler does not support risc-v zfh extension. NCNN_ZFH will be OFF.")
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endif()
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endif()
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elseif(CMAKE_SIZEOF_VOID_P EQUAL 4)
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set(CMAKE_REQUIRED_FLAGS "-march=rv32gcv")
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check_cxx_source_compiles("#include <riscv_vector.h>\nvfloat32m8_t test(vfloat32m8_t s, vfloat32m8_t w, float v, size_t vl) { return __riscv_vfmacc_vf_f32m8(s, v, w, vl); }\nvfloat32m1x2_t test2(vfloat32m1_t x) { return __riscv_vcreate_v_f32m1x2(x, x); }" NCNN_COMPILER_SUPPORT_RISCV_V)
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set(CMAKE_REQUIRED_FLAGS "-march=rv32gc_zfh -D__fp16=_Float16")
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check_cxx_source_compiles("__fp16 test(__fp16 a) { return a * a; }" NCNN_COMPILER_SUPPORT_RISCV_ZFH)
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set(CMAKE_REQUIRED_FLAGS "-march=rv32gcv_zfh_zvfh -D__fp16=_Float16")
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check_cxx_source_compiles("#include <riscv_vector.h>\nvfloat16m8_t test(vfloat16m8_t s, vfloat16m8_t w, __fp16 v, size_t vl) { return __riscv_vfmacc_vf_f16m8(s, v, w, vl); }\nvfloat16m1x2_t test2(vfloat16m1_t x){ return __riscv_vcreate_v_f16m1x2(x, x); }" NCNN_COMPILER_SUPPORT_RISCV_ZVFH)
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set(CMAKE_REQUIRED_FLAGS "-march=rv32gc_zfh_xtheadvector -D__fp16=_Float16")
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check_cxx_source_compiles("#include <riscv_vector.h>\nvfloat16m8_t test(vfloat16m8_t s, vfloat16m8_t w, __fp16 v, size_t vl) { return __riscv_vfmacc_vf_f16m8(s, v, w, vl); }\nvfloat16m1x2_t test2(vfloat16m1_t x){ return __riscv_vcreate_v_f16m1x2(x, x); }" NCNN_COMPILER_SUPPORT_RISCV_XTHEADVECTOR)
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unset(CMAKE_REQUIRED_FLAGS)
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if(NCNN_COMPILER_SUPPORT_RISCV_V OR NCNN_COMPILER_SUPPORT_RISCV_XTHEADVECTOR)
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option(NCNN_RVV "optimize risc-v platform with v extension" ON)
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else()
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message(WARNING "The compiler does not support risc-v v or xtheadvector extension. NCNN_RVV will be OFF.")
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endif()
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if(NCNN_COMPILER_SUPPORT_RISCV_XTHEADVECTOR)
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option(NCNN_XTHEADVECTOR "optimize risc-v platform with xtheadvector extension" ON)
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else()
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message(WARNING "The compiler does not support risc-v xtheadvector extension. NCNN_XTHEADVECTOR will be OFF.")
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endif()
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if(NCNN_COMPILER_SUPPORT_RISCV_ZFH)
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option(NCNN_ZFH "optimize risc-v platform with zfh extension" ON)
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if(NCNN_COMPILER_SUPPORT_RISCV_ZVFH OR NCNN_COMPILER_SUPPORT_RISCV_XTHEADVECTOR)
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if(NCNN_RVV AND NCNN_ZFH)
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option(NCNN_ZVFH "optimize risc-v platform with zvfh extension" ON)
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endif()
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else()
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message(WARNING "The compiler does not support zvfh extension. NCNN_ZVFH will be OFF.")
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endif()
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else()
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message(WARNING "The compiler does not support risc-v zfh extension. NCNN_ZFH will be OFF.")
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endif()
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endif()
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endif()
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elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(powerpc|ppc)")
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elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(powerpc|ppc)")
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set(NCNN_TARGET_ARCH powerpc)
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set(NCNN_TARGET_ARCH powerpc)
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+42
-19
@@ -415,26 +415,49 @@ macro(ncnn_add_layer class)
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endif()
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endif()
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endif()
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endif()
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if(NCNN_TARGET_ARCH STREQUAL "riscv" AND CMAKE_SIZEOF_VOID_P EQUAL 8)
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if(NCNN_TARGET_ARCH STREQUAL "riscv")
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if(NCNN_RUNTIME_CPU AND NCNN_RVV)
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if(CMAKE_SIZEOF_VOID_P EQUAL 8)
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ncnn_add_arch_opt_layer(${class} rvv "-march=rv64gcv")
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if(NCNN_RUNTIME_CPU AND NCNN_RVV)
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endif()
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ncnn_add_arch_opt_layer(${class} rvv "-march=rv64gcv")
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if(NCNN_ZFH)
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endif()
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if(NOT NCNN_RUNTIME_CPU AND NCNN_ZVFH)
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if(NCNN_ZFH)
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ncnn_add_arch_opt_source(${class} zfh "-march=rv64gcv_zfh_zvfh -D__fp16=_Float16")
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if(NOT NCNN_RUNTIME_CPU AND NCNN_ZVFH)
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elseif(NOT NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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ncnn_add_arch_opt_source(${class} zfh "-march=rv64gcv_zfh_zvfh -D__fp16=_Float16")
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ncnn_add_arch_opt_source(${class} zfh "-march=rv64gc_zfh_xtheadvector -D__riscv_zvfh=1 -D__fp16=_Float16")
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elseif(NOT NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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else()
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ncnn_add_arch_opt_source(${class} zfh "-march=rv64gc_zfh_xtheadvector -D__riscv_zvfh=1 -D__fp16=_Float16")
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ncnn_add_arch_opt_source(${class} zfh "-march=rv64gc_zfh -D__fp16=_Float16")
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else()
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ncnn_add_arch_opt_source(${class} zfh "-march=rv64gc_zfh -D__fp16=_Float16")
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endif()
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endif()
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if(NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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# linker complains the conflict of v and xtheadvector, so disable generating any riscv attributes
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ncnn_add_arch_opt_layer(${class} xtheadvector "-march=rv64gc_xtheadvector -mno-riscv-attribute -Wa,-mno-arch-attr")
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ncnn_add_arch_opt_layer_source(${class} zfh xtheadvector "-march=rv64gc_zfh_xtheadvector -mno-riscv-attribute -Wa,-mno-arch-attr -D__fp16=_Float16")
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endif()
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if(NCNN_RUNTIME_CPU AND NCNN_ZVFH)
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ncnn_add_arch_opt_layer_source(${class} zfh rvv "-march=rv64gcv_zfh_zvfh -D__fp16=_Float16")
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endif()
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elseif(CMAKE_SIZEOF_VOID_P EQUAL 4)
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if(NCNN_RUNTIME_CPU AND NCNN_RVV)
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ncnn_add_arch_opt_layer(${class} rvv "-march=rv32gcv")
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endif()
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if(NCNN_ZFH)
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if(NOT NCNN_RUNTIME_CPU AND NCNN_ZVFH)
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ncnn_add_arch_opt_source(${class} zfh "-march=rv32gcv_zfh_zvfh -D__fp16=_Float16")
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elseif(NOT NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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ncnn_add_arch_opt_source(${class} zfh "-march=rv32gc_zfh_xtheadvector -D__riscv_zvfh=1 -D__fp16=_Float16")
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else()
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ncnn_add_arch_opt_source(${class} zfh "-march=rv32gc_zfh -D__fp16=_Float16")
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endif()
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endif()
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if(NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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# linker complains the conflict of v and xtheadvector, so disable generating any riscv attributes
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ncnn_add_arch_opt_layer(${class} xtheadvector "-march=rv32gc_xtheadvector -mno-riscv-attribute -Wa,-mno-arch-attr")
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ncnn_add_arch_opt_layer_source(${class} zfh xtheadvector "-march=rv32gc_zfh_xtheadvector -mno-riscv-attribute -Wa,-mno-arch-attr -D__fp16=_Float16")
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endif()
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if(NCNN_RUNTIME_CPU AND NCNN_ZVFH)
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ncnn_add_arch_opt_layer_source(${class} zfh rvv "-march=rv32gcv_zfh_zvfh -D__fp16=_Float16")
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endif()
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endif()
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endif()
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|
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if(NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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# linker complains the conflict of v and xtheadvector, so disable generating any riscv attributes
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ncnn_add_arch_opt_layer(${class} xtheadvector "-march=rv64gc_xtheadvector -mno-riscv-attribute -Wa,-mno-arch-attr")
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ncnn_add_arch_opt_layer_source(${class} zfh xtheadvector "-march=rv64gc_zfh_xtheadvector -mno-riscv-attribute -Wa,-mno-arch-attr -D__fp16=_Float16")
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endif()
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if(NCNN_RUNTIME_CPU AND NCNN_ZVFH)
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ncnn_add_arch_opt_layer_source(${class} zfh rvv "-march=rv64gcv_zfh_zvfh -D__fp16=_Float16")
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endif()
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endif()
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||||||
endif()
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endif()
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+35
-15
@@ -671,24 +671,44 @@ if(NCNN_TARGET_ARCH STREQUAL "loongarch")
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endif()
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endif()
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endif()
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endif()
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if(NCNN_TARGET_ARCH STREQUAL "riscv" AND CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT C906)
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if(NCNN_TARGET_ARCH STREQUAL "riscv" AND NOT C906)
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if(NOT NCNN_RUNTIME_CPU AND NCNN_RVV)
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if(CMAKE_SIZEOF_VOID_P EQUAL 8)
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set(RISCV_MARCH_FLAG "-march=rv64gcv")
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if(NOT NCNN_RUNTIME_CPU AND NCNN_RVV)
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if(NCNN_ZFH)
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set(RISCV_MARCH_FLAG "-march=rv64gcv")
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set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zfh")
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if(NCNN_ZFH)
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target_compile_options(ncnn PRIVATE -D__fp16=_Float16)
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set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zfh")
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target_compile_options(ncnn PRIVATE -D__fp16=_Float16)
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endif()
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if(NCNN_ZVFH)
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||||||
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set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zvfh")
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||||||
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endif()
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||||||
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elseif(NOT NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
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||||||
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set(RISCV_MARCH_FLAG "-march=rv64gc_xtheadvector")
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||||||
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if(NCNN_ZFH)
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||||||
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set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zfh")
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||||||
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target_compile_options(ncnn PRIVATE -D__riscv_zvfh=1 -D__fp16=_Float16)
|
||||||
|
endif()
|
||||||
endif()
|
endif()
|
||||||
if(NCNN_ZVFH)
|
target_compile_options(ncnn PRIVATE ${RISCV_MARCH_FLAG})
|
||||||
set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zvfh")
|
elseif(CMAKE_SIZEOF_VOID_P EQUAL 4)
|
||||||
endif()
|
if(NOT NCNN_RUNTIME_CPU AND NCNN_RVV)
|
||||||
elseif(NOT NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
|
set(RISCV_MARCH_FLAG "-march=rv32gcv")
|
||||||
set(RISCV_MARCH_FLAG "-march=rv64gc_xtheadvector")
|
if(NCNN_ZFH)
|
||||||
if(NCNN_ZFH)
|
set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zfh")
|
||||||
set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zfh")
|
target_compile_options(ncnn PRIVATE -D__fp16=_Float16)
|
||||||
target_compile_options(ncnn PRIVATE -D__riscv_zvfh=1 -D__fp16=_Float16)
|
endif()
|
||||||
|
if(NCNN_ZVFH)
|
||||||
|
set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zvfh")
|
||||||
|
endif()
|
||||||
|
elseif(NOT NCNN_RUNTIME_CPU AND NCNN_XTHEADVECTOR)
|
||||||
|
set(RISCV_MARCH_FLAG "-march=rv32gc_xtheadvector")
|
||||||
|
if(NCNN_ZFH)
|
||||||
|
set(RISCV_MARCH_FLAG "${RISCV_MARCH_FLAG}_zfh")
|
||||||
|
target_compile_options(ncnn PRIVATE -D__riscv_zvfh=1 -D__fp16=_Float16)
|
||||||
|
endif()
|
||||||
endif()
|
endif()
|
||||||
|
target_compile_options(ncnn PRIVATE ${RISCV_MARCH_FLAG})
|
||||||
endif()
|
endif()
|
||||||
target_compile_options(ncnn PRIVATE ${RISCV_MARCH_FLAG})
|
|
||||||
endif()
|
endif()
|
||||||
|
|
||||||
if(NCNN_PPC64LE_VSX)
|
if(NCNN_PPC64LE_VSX)
|
||||||
|
|||||||
@@ -0,0 +1,41 @@
|
|||||||
|
set(CMAKE_SYSTEM_NAME Linux)
|
||||||
|
set(CMAKE_SYSTEM_PROCESSOR riscv32)
|
||||||
|
|
||||||
|
if(DEFINED ENV{RISCV_ROOT_PATH})
|
||||||
|
file(TO_CMAKE_PATH $ENV{RISCV_ROOT_PATH} RISCV_ROOT_PATH)
|
||||||
|
else()
|
||||||
|
message(FATAL_ERROR "RISCV_ROOT_PATH env must be defined")
|
||||||
|
endif()
|
||||||
|
|
||||||
|
set(RISCV_ROOT_PATH ${RISCV_ROOT_PATH} CACHE STRING "root path to riscv toolchain")
|
||||||
|
|
||||||
|
set(CMAKE_C_COMPILER "${RISCV_ROOT_PATH}/bin/riscv64-unknown-linux-gnu-gcc")
|
||||||
|
set(CMAKE_CXX_COMPILER "${RISCV_ROOT_PATH}/bin/riscv64-unknown-linux-gnu-g++")
|
||||||
|
|
||||||
|
set(CMAKE_FIND_ROOT_PATH "${RISCV_ROOT_PATH}/riscv64-unknown-linux-gnu")
|
||||||
|
|
||||||
|
set(CMAKE_SYSROOT "${RISCV_ROOT_PATH}/sysroot")
|
||||||
|
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_PROGRAM)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
|
||||||
|
endif()
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_LIBRARY)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
|
||||||
|
endif()
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_INCLUDE)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
|
||||||
|
endif()
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_PACKAGE)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
|
||||||
|
endif()
|
||||||
|
|
||||||
|
set(CMAKE_FIND_LIBRARY_SUFFIXES_INIT ".a")
|
||||||
|
set(CMAKE_C_FLAGS "-march=rv32gcv_zicbom_zicbop_zicboz_zihintpause_zfh_zvfh_zba_zbb_zbc_zbs_svinval_svnapot_svpbmt_xtheadc_xtheadvdot -mabi=ilp32d -mtune=c907 -static")
|
||||||
|
set(CMAKE_CXX_FLAGS "-march=rv32gcv_zicbom_zicbop_zicboz_zihintpause_zfh_zvfh_zba_zbb_zbc_zbs_svinval_svnapot_svpbmt_xtheadc_xtheadvdot -mabi=ilp32d -mtune=c907 -static")
|
||||||
|
|
||||||
|
# cache flags
|
||||||
|
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "c flags")
|
||||||
|
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS}" CACHE STRING "c++ flags")
|
||||||
|
|
||||||
|
# export RISCV_ROOT_PATH=/home/yuzuki/SDK/Xuantie-900-gcc-linux-6.6.0-glibc-x86_64-V3.1.0
|
||||||
|
# cmake -DCMAKE_TOOLCHAIN_FILE=../toolchains/c907-rv32-v310.toolchain.cmake -DCMAKE_BUILD_TYPE=release -DNCNN_BUILD_TESTS=ON -DNCNN_OPENMP=ON -DNCNN_RUNTIME_CPU=OFF -DNCNN_RVV=ON -DNCNN_XTHEADVECTOR=OFF -DNCNN_ZFH=ON -DNCNN_ZVFH=ON -DNCNN_SIMPLEOCV=ON -DNCNN_BUILD_EXAMPLES=ON ..
|
||||||
@@ -0,0 +1,41 @@
|
|||||||
|
set(CMAKE_SYSTEM_NAME Linux)
|
||||||
|
set(CMAKE_SYSTEM_PROCESSOR riscv32)
|
||||||
|
|
||||||
|
if(DEFINED ENV{RISCV_ROOT_PATH})
|
||||||
|
file(TO_CMAKE_PATH $ENV{RISCV_ROOT_PATH} RISCV_ROOT_PATH)
|
||||||
|
else()
|
||||||
|
message(FATAL_ERROR "RISCV_ROOT_PATH env must be defined")
|
||||||
|
endif()
|
||||||
|
|
||||||
|
set(RISCV_ROOT_PATH ${RISCV_ROOT_PATH} CACHE STRING "root path to riscv toolchain")
|
||||||
|
|
||||||
|
set(CMAKE_C_COMPILER "${RISCV_ROOT_PATH}/bin/riscv64-unknown-linux-gnu-gcc")
|
||||||
|
set(CMAKE_CXX_COMPILER "${RISCV_ROOT_PATH}/bin/riscv64-unknown-linux-gnu-g++")
|
||||||
|
|
||||||
|
set(CMAKE_FIND_ROOT_PATH "${RISCV_ROOT_PATH}/riscv64-unknown-linux-gnu")
|
||||||
|
|
||||||
|
set(CMAKE_SYSROOT "${RISCV_ROOT_PATH}/sysroot")
|
||||||
|
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_PROGRAM)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
|
||||||
|
endif()
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_LIBRARY)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
|
||||||
|
endif()
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_INCLUDE)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
|
||||||
|
endif()
|
||||||
|
if(NOT CMAKE_FIND_ROOT_PATH_MODE_PACKAGE)
|
||||||
|
set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
|
||||||
|
endif()
|
||||||
|
|
||||||
|
set(CMAKE_FIND_LIBRARY_SUFFIXES_INIT ".a")
|
||||||
|
set(CMAKE_C_FLAGS "-march=rv64gcv_zicbom_zicbop_zicboz_zihintpause_zfh_zvfh_zba_zbb_zbc_zbs_svinval_svnapot_svpbmt_xtheadc_xtheadvdot -mabi=lp64d -mtune=c907 -static")
|
||||||
|
set(CMAKE_CXX_FLAGS "-march=rv64gcv_zicbom_zicbop_zicboz_zihintpause_zfh_zvfh_zba_zbb_zbc_zbs_svinval_svnapot_svpbmt_xtheadc_xtheadvdot -mabi=lp64d -mtune=c907 -static")
|
||||||
|
|
||||||
|
# cache flags
|
||||||
|
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "c flags")
|
||||||
|
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS}" CACHE STRING "c++ flags")
|
||||||
|
|
||||||
|
# export RISCV_ROOT_PATH=/home/yuzuki/SDK/Xuantie-900-gcc-linux-6.6.0-glibc-x86_64-V3.1.0
|
||||||
|
# cmake -DCMAKE_TOOLCHAIN_FILE=../toolchains/c907-v310.toolchain.cmake -DCMAKE_BUILD_TYPE=release -DNCNN_BUILD_TESTS=ON -DNCNN_OPENMP=ON -DNCNN_RUNTIME_CPU=OFF -DNCNN_RVV=ON -DNCNN_XTHEADVECTOR=OFF -DNCNN_ZFH=ON -DNCNN_ZVFH=ON -DNCNN_SIMPLEOCV=ON -DNCNN_BUILD_EXAMPLES=ON ..
|
||||||
Reference in New Issue
Block a user