Commit Graph
61 Commits
Author SHA1 Message Date
JeremyRand 0a8cf31a05 Add POWER8 VSX toolchains (#4853)
* Add POWER8 VSX toolchains

POWER8, though slower than POWER9, is still used in the wild; these
toolchains should still be much faster on POWER8 than POWER8 without VSX
optimizations.

* VSX toolchains: set -cpu arg in QEMU CI tests
2023-08-06 22:16:34 +08:00
JeremyRandandJeremy Rand 472244420e VSX toolchains: check for SSE2 support (#4845)
Improves compatibility with Clang 11.

Also rename NCNN_SSE* options to NCNN_VSX_SSE* to avoid conflict between
x86 and POWER (went unnoticed before because x86 doesn't have an option
for toggling SSE 4.1).

Co-authored-by: Jeremy Rand <jeremyrand@danwin1210.de>
2023-07-11 15:56:51 +08:00
JeremyRandandJeremy Rand 47e0daf4a1 Translate x86_64 SSE to ppc64le VSX intrinsics (#4807)
* Add POWER9 VSX toolchains

Translating x86_64 SSE to ppc64le VSX intrinsics yields a quite large
speedup on POWER9. See this article for background:

https://www.talospace.com/2019/07/easier-power-vectorizing-for-fun-and.html

* Add power9le docs

* power9le clang toolchain: Document Clang 13+ requirement

---------

Co-authored-by: Jeremy Rand <jeremyrand@danwin1210.de>
2023-07-06 16:02:05 +08:00
nihui d294b26783 add qnx710.toolchain.cmake (#4706) 2023-05-08 16:40:56 +08:00
Zhuo Zhang b709f041fe Add qnx.toolchain.cmake (#4213) 2023-05-08 16:33:41 +08:00
nihui 490816b21b update ios toolchain, simulator arm64 ci, mac catalyst ci (#4697) 2023-05-06 18:14:19 +08:00
nihui 6019f47f08 ci loongarch64 lsx (#4344) 2022-11-11 20:52:22 +08:00
陸 言 0f38cb2cd8 Add TH1520 (4*C910V) toolchain support. (#4267) 2022-10-13 13:11:22 +08:00
e7eadca6c1 RVV: use new interface for segment load/store & change word_type to size_t&add clang ci (part #4100) (#4118)
* RVV: use size_t for vl

* RVV: replace vsseg.v tuple type by using regex

-----

search:
vsseg([1-9])e(8|16|32)_v_(f|i|u)\2m(1|2|4|8)x\1\(([ -~]+), vcreate_\3\2m\4x\1\(([ -~]+)\), vl\);

substitute by:
vsseg$1e$2_v_$3$2m$4($5, $6, vl);

* RVV: replace vssseg.v tuple types by using regex

---

search:
vssseg([1-9])e(8|16|32)_v_f\2m1x\1\(([ -~]+), vcreate_f\2m1x\1\(([ -~]+)\), vl\);

substitute by:
vssseg$1e$2_v_f$2m1($3, $4, vl);

* RVV: replace vlseg.v tuple types in load/store

* RVV: replace vloxseg2ei32.v tuple types

* RVV: add a wrapper for old compilers

* RVV: add segment load/store wrapper in pakcing

* RVV: fix cmake test

* RVV: make clang happy by dropping VLAs in sgemm

* RVV: add clang cmake toolchain configure

* RVV: add clang ci, riscv64-unknown-linux-gnu

Co-authored-by: thelastlin <thelastlin@users.noreply.github.com>
Co-authored-by: nihui <shuizhuyuanluo@126.com>
2022-10-01 21:24:37 +08:00
nihui b4ba207c18 more strict compiler rvv checks, drop rvv-071 support (#4094) 2022-07-28 17:47:27 +08:00
nihui e64245c44a ci x86 no sse, do not force sse2 for x86 32bit toolchain (#4043) 2022-07-19 20:24:26 +08:00
nihui c5bb0e52ed add ingenic-x2000 toolchain file 2022-07-13 21:32:35 +08:00
陸 言 cae8d0f1d7 Add Loongson 2F toolchain support (refer to AOSC) (#3992) 2022-07-09 21:45:07 +08:00
nihui 1fd7138d2f armv7 vfpv4 infrastructure (#3929)
* armv7 vfpv4 infrastructure
* optional fp16 format ieee
* arm neon assembly optimization for cast fp16/bf16
2022-06-20 16:25:26 +08:00
nihui d373407bcb add c906 c910 v240 toolchain 2022-05-29 20:50:35 +08:00
nihui f79073c182 update how-to-build doc for raspberrypi and d1 2022-05-19 22:07:10 +08:00
Xavier Hsinyuan 29b6a32ac0 RVV: follow intrinsic doc, replace vfredsum_* with vfredusum_* (#3790)
* RVV: follow intrinsic doc, vfredusum -> vfredsum

* C906: change toolchains for vfredusum

* RVV: test compiler for vfredusum_vs_*
2022-05-15 21:51:49 +08:00
jasonZhang 2b0064c3db fix armv7 platform build tests error (#3710) 2022-04-16 13:05:36 +08:00
nihui 5b7268d95f loongarch64 ci (#3455) 2022-04-12 15:12:47 +08:00
nihui c0a94cd9ca fix armv7 without neon (#3514) 2022-01-18 23:15:54 +08:00
nihui 3a83704c38 binary4d, unary4d (#3443) 2021-12-28 23:13:44 +08:00
Zhuo Zhang 880e2805fe add c906 v223 toolchain (#3449) 2021-12-27 10:27:08 +08:00
nihui 64ba12be23 add c906 v2.2.2 toolchain 2021-12-04 15:36:12 +08:00
Martin Han 7633257ac5 Add support to Ingenic X2000 & T40 CPU (#3343)
* Support Ingenic X2000 & T40

T40 claimed to have MIPS32R2 with MSA, but tested not working on my unit, so set to mips32r2 without MSA.

* Add Ingenic T40XP benchmark result
2021-11-13 13:27:35 +08:00
tsuibinandtsuibin 1699aaaca6 added support for loongarch64 (#3094)
Co-authored-by: tsuibin <tsuibin@loongson.cn>
2021-07-20 10:44:27 +08:00
nihui 1f49fc4b67 mips msa optimization for padding packing flatten innerproduct convolution convolutiondepthwise general cases 2021-07-04 16:00:01 +08:00
nihui b8e03ced3c allow examples building with simpleocv 2021-07-03 11:57:08 +08:00
nihuini 26ea87cc25 do not define android macro for jetson, fix #2939 2021-05-24 11:11:11 +08:00
nihui 655fb3b5eb fix rv64gcv test coverage build 2021-05-05 17:29:05 +08:00
nihui 11958424c2 runtime riscv v and zfh dispatch, riscv v optimization for cast 2021-05-05 17:07:40 +08:00
nihui 48d5dbf33f ci riscv rvv coverage (#2886) 2021-05-04 22:02:30 +08:00
Zhang Xianyi a1ece94f51 Use RVV spec 0.7.1 for C906. (#2868) 2021-04-27 07:27:07 +08:00
nihui 45bf3cd779 add runtime riscv v detection function, the initial c906 riscv linux toolchain 2021-04-24 15:35:17 +08:00
DC Technology 11d1de7858 fix iOS minimum version,when used Vukan 1.2 (#2621)
* fix iOS minimum version,when used Vukan 1.2
* Update IOS mininum version to 9.0
2021-02-01 16:44:38 +08:00
sunnycase 124d2c3d85 Support V831 (#2478) 2020-12-19 08:44:32 +08:00
8f8f2de4d0 SSE2 optimization pack (#2123)
* SSE2: BatchNorm

* Fixed batch norm in AVX configuration

* Optimized register size switch

* Attempt to pass CI

* Attempt to pass CI

* Bias op

* Element wise ops

* Support packing on x86 by default

* Fixed macro range in bias

* Use aligned read for packed data

* Update testutil.h

* Update pooling_x86.cpp

* Support wasn SIMD

* Fix emscripten compiler flags

* fix build

* more ci fix

* concat x86 pack4

* flatten x86 pack4

* more x86 pack4

* ci pass

* fix

* enable sse2 mathfun

* enable --experimental-wasm-simd

Co-authored-by: nihui <shuizhuyuanluo@126.com>
Co-authored-by: nihuini <nihuini@tencent.com>
2020-11-16 12:43:09 +08:00
Zhuo Zhang 4a1c463cff fix: fix gnueabihf cmake toolchain neon flags (#2272)
Test platform: ZYNQ 7020, there is vfpv3 but isn't vfpv4
2020-11-07 15:30:34 +08:00
nihui de039b3546 ci x86 32bit (#2116) 2020-09-15 11:15:12 +08:00
nihui 926743ddae cache cflags and cxxflags for hisi toolchain files 2020-09-12 11:32:05 +08:00
nihuini 1cdb66f614 c++03 ci 2020-09-08 19:17:48 +08:00
nihui 7ace8a933d powerpc64, fix #2054 (#2058), workaround gcc altivec bug 2020-09-05 14:15:24 +08:00
Leo 5afd318b86 Support remove libstdc++ denpendency (#2030)
* [build] add toolchain file w/o stdcxx dependency

* [build] link m and gcc lib explicitly

* [ncnn] complete simple stl impl

* [ncnn] adapt for ncnn simplestl

* [test] adapt for ncnn simplestl

* [ncnn] fix missing algorithm and list when simplestl disabled

* [ncnn] fix guard for operator new and delete

* [style] fix the code style

* [build] fix build failed on darwin and emscripten

* [ci] do not import cxx to avoid operator conflict

* [ncnn] add temporary partial_sort impl using bubble sort

heap sort should be used for better perf.

* [ncnn] add std greater and less function

* [ncnn] fix placement new operator overload

* [ncnn] add operator delete with size info

* [build] disable exception, rtti, example and tools when simplestl on

* [build] add toolchain for arm simplestl

* [build] add toolchain for aarch64 simplestl

* [ncnn] move initializer to constructor

* [ncnn] use deteiled type instead of auto

* [ncnn] use plain lib name in target_link_libraries
2020-08-28 09:20:56 +08:00
nihui e0627ac855 Ci riscv64 linux (#1951) 2020-07-22 12:45:42 +08:00
nihui aee9f8a637 Ci mips mips64 (#1948) 2020-07-21 22:24:32 +08:00
nihui 11cffce114 armv8.2 infrastructure (#1856)
* runtime cpu dispatch

* force thread one

* disable openmp for coverage

* simplify test layer

* print NCNN_TARGET_ARCH

* less ci build variants

* weight fp16 storage option

* test convdw int8

* apple a12 a13

* ncnn_add_layer ncnn_add_shader cmake macro
2020-07-19 19:29:52 +08:00
nihui 3ff40b0679 Ci rv32imc (#1940) 2020-07-15 20:25:44 +08:00
nihui fe6bc1ed4d Ci rv64gcv and rv64gc (#1936) 2020-07-14 22:55:19 +08:00
Tijmen VerhulsdonckandRestyled.io 73aa99e83c LSTM arm/x86 + fp16 innerproduct arm (#1881)
* added fp16 weight storage version

* Small changes

* Fixed fp16 weight storage layers

* fix innerproduct

* fix loop error

* Fix windows build.

Disable fp 16 conversion when detecting int8 weights.

Implement requested changes.

* Restyled by clang-format

* Restyled by astyle

* Restyled by clang-format

* Restyled by astyle

* Update option.cpp

Set fp16 storage based on vulkan being used or not.

* added ability for storing state in lstm layer

* added avx lstm

* added arm lstm

* fix innerproduct activation location and add 4 parallel channel version

* Restyled by clang-format

* Restyled by astyle

* Restyled by clang-format

* Restyled by astyle

* revert arm file

* commit before switch

* implement requested changes

* Restyled by clang-format

* Restyled by astyle

* Restyled by clang-format

* Restyled by astyle

* More x86 optimized implementations of common layers.

Added LSTM layers for arm and x86 + a ctest to verify the layer accuracy

Added fp16 innerproduct for arm

* fix non avx build

* Add fp16 arm compiler and cpu checks. Remove statefullness from LSTM implementation.

* Fix build check for fp16 arm

* Bypass lstm_fp16 if not supported

* Build order was incorrect

* fix std::min missing in windows build

* Restyled by clang-format

* Restyled by astyle

* Restyled by clang-format

* Restyled by astyle

* attempting to fix gnu build by enabling: -mfp16-format=ieee to fix the missing __fp16 type

* remove double "fix"

* Specify ieee fp16 format

* implement requested changes

* fix arm non-fp16 build

* fix arm lstm

* Restyled/pull 1881 (#15)

* Restyled by clang-format

* Restyled by astyle

* Restyled by clang-format

* Restyled by astyle

Co-authored-by: Restyled.io <commits@restyled.io>

* Check blob size on arm lstm

* fix styling

Co-authored-by: Restyled.io <commits@restyled.io>
2020-07-01 21:40:21 +08:00
nihuini 99d34135d7 build both ios native and bitcode library, fix #1742 2020-06-03 14:44:43 +08:00
nihui 163e2c0655 Travis ci armv7 (#1680)
* try checkout v2 to resolve some ci issue
2020-04-06 15:58:31 +08:00